Current Mode Multiple-Valued Logic Circuits in Digital CMOS Technology

Complexity of silicon integrated circuits (IC) in very large scale of integration (VLSI) using binary logic is reaching a point where most of the silicon area is occupied with interconnecting lines among devices on the chip, which represents a drawback of the approach. First implication of the high wiring complexity is increased packing complexity with increased number of pins (in today's VLSI IC number of pins exceeds 250). Therefore, high density layout must be used for data bus both in the silicon and on the printed circuit board. Second implication is increased cross-talk noise which is one of the limiting factors in design of high-speed and sophisticated ICs, especially in a low-power voltage environment and high-speed chips for arithmetic applications. Alternate approaches for design of integrated circuits for arithmetic operations that would use standard complementary metal-oxide-semiconductor (CMOS) technology and address the above issues have been proposed. One possible solution for reduction of high wiring complexity, without affecting performance of a chip, is injecting more than two levels of signal into a single wire. This is known as multiple-valued logic (MVL), however, due to narrow voltage margins, especially in low power designs, current mode (CM) is proposed as a better approach to MVL design. Multiple-valued logic (MVL) has been studied extensively due to its potential advantages in chips performing arithmetic intensive operations. Reduction in the wiring density leaves space for relaxed distance between the data lines, therefore reducing parasitic capacitances between the lines and, finally, reducing cross talk noise. Research effort in this thesis is directed towards the development of functional currentmode multiple-valued logic (CMMVL) circuits, as well as such basic building blocks as current sources, current mirrors and current comparators. In this thesis, the CMMVL approach is used to design high-speed low-power CMMVL adders that can be used in higher level designs such as CMMVL multipliers. ... lll